Yuki SoC

This is a system-on-chip using my Yuki CPU and some peripherals written in Verilog. It is currently realised on an Altera Cyclone 4 EP4C6 board.

Features of the SoC:

• 4  UART’s with adjustable baudrate and 16 byte receive buffer
• 1  Speedcontroller which can be used to change the CPU clock
• 1  MMU/MPU with 4kByte pages
• 1  Yuki CPU
• 1  4kByte blockram for startup
• 1 Interrupt controller for up to 32 interrupt sources

I also wrote a simple machinecode-monitor using my Yuki CPU assembler.